Weekly Research Meeting Schedule


The regular meeting time and place is 1:00 p.m. Thursdays in room 460 CB. The following topics will be discussed:
2/5 Joe Hawkins
WildForce Tutorial
2/12 Paul Graham
IRAM (Intelligent RAM) Overview
2/19 Scott Hemmert
Overview of HPEC (High Performance Embedded Computing) boards
2/26 Mark Anderson
DSP Architectures
3/5 Jeremy Anderson
Advanced Memory Technologies
3/12 Clark Taylor
Multi-media Processors
3/19 Carl Worth
New FPGA Architectures
3/26 Matt Severson
Introduction to new FPGA-friendly Applications
4/2 Peter Bellows
Legacy Document Imaging
4/9 Mike Rytting
VLIW Architectures
Go to the Reconfigurable Logic Lab home page
Last modified: Fri Jan 30 10:19:52 MST 1998

Please send comments to: hutch@ee.byu.edu