CLAyTools Design Software MACRO LIBRARY LISTING The CLAyTools Macro Library augments the design kit by providing more than 300 ready-made layouts of a variety of standard functions. Users can modify layouts to fit specific layout requirements and can create and save their own hard and soft macros. Note that all macros can be either hard or soft; they can have drive andlor open collector outputs. Also, the specified area is not necessarily the minimum size possible for a given function; often, areas have been optimized for routing efficiency. All the following macros are supported in the libraries for Viewlogic, Cadence, Verilog and Synopsys. No. Area Cells Cells (X x Y) Gates-NAND ND2 2 Input NAND 1 1x1 ND3 3 Input NAND 1 1x1 ND4 4 Input NAND 2 2x1 ND5 5 Input NAND 2 2x1 ND6 6 Input NAND 3 3x1 ND8 8 Input NAND 4 4x1 NDND Twin 2 Input NAND's 1 1x1 Gates-AND AN2 2 InputAND 1 1x1 AN3 3 InputAND 1 1x1 AN4 4 InputAND 2 2x1 AN5 5 InputAND 2 2x1 AN6 6 InputAND 3 3x1 AN8 8 InputAND 4 4x1 AN2L 2 InputAND(AB') 1 1x1 AN21NV 2 InputAND with Inverter(A-L)L' 1 1x1 ANXO 2 InputAND Feeding an XOR 1 1x1 Gates-NOR NR2 2 Input NOR 2 2x1 NR3 3 Input NOR 4 2x2 NR4 4 Input NOR 4 4x1 NR5 5 Input NOR 5 5x1 NR6 6 Input NOR 6 6x1 NR8 8 Input NOR 10 5x2 NR2L 2 Input NOR with Invered Input 1 1x1 Gates - OR OR2 2 InputOR 3 3x1 OR3 3 Input OR 3 2x2 OR4 4 InputOR 5 5x1 OR5 5 Input OR 6 6x1 OR6 6 Input OR 7 7x1 OR8 8 Input OR 10 5x2 OR2L 2 Input OR (A+B') 1 1x1 ORL 2 Input OR (ANB) XOR AN' 1 1x1 ORT 2 Input OR (AB') XOR B 1 1x1 Gates - XOR X02 2 Input Exclusive OR 1 1x1 X03 3 Input Exclusive OR 2 2x1 X04 4 Input Exclusive OR 4 2x2 XOND 2 Input Exclusive OR/NAND 1 1x1 XOND3 2 Input Exclusive OR with 3 Input NAND 1 1x1 XN2 2 Input Exclusive NOR 2 2x1 XN3 3 Input Exclusive NOR 3 3x1 XN4 4 Input Exclusive NOR 5 3x2 Inverters INV Inverter 1 1x1 INVINV Twin Inverters 1 1x1 INVAN2 Inverter + 2 Input AND 1 1x1 AO22 AND-OR Inverter 2-2 Inputs 4 2x2 AO122 AND-OR Inverter 2-2 Inputs 4 2x2 OAI22 OR-AND Inverter 2-2 Inputs 4 2x2 Logic Constants ONE Logic One 1 1x1 ONEONE Two Logic Ones 1 1x1 ZERO Logic Zero 1 1x1 ZEROONE Logic One and Logic Zero 1 1x1 ZEROZEROTwo Logic Zeros 1 1x1 Multiplexers MUX 2 to 1 Multiplexer, Fast 1 1x1 MUX21 2 to 1 Multiplexer 4 2x2 MUX3 3 to 1 Multiplexer, Fast 3 3x1 MUX31 3 to 1 Multiplexer 10 4x3 MUX4 4 to 1 Multiplexer, Fast 4 2x2 MUX41 4 to 1 Multiplexer 18 5x4 MUX8 8 to 1 Multiplexer, Fast 10 3x4 MUX81 8 to 1 Multiplexer 52 7x9 SELBUFS Straight-Through Select Buffer 1 1x1 SELBUFX Select Buffer 1 1x1 BUF Buffer 1 1x1 Decoders/Encoders DC24 2 to 4 Decoder Active High/Low 9 2x5 DC24L 2 to 4 Decoder Active Low 6 1x6 DC24H 2 to 4 DecoderActive High 4 2x2 DC38L 3 to 8 Decoder Active Low 24 4x8 DC38H 3 to 8 DecoderActive High 20 3x8 EN42 4 to 2 Encoder 6 2x3 EN83 8 to 3 Encoder 11 4x4 BCD7SEG 7 Segment BCD Display (0 to A) 55 4x23 DIS7SEG 7 Segment BCD Display (0 to F) 98 5x28 Latches LD D Latch Transparent High 8 4x2 LDL D Latch Transparent Low 6 3x2 LDR D LatchTransparent High, Reset Low 8 4x2 LSRND NAND SR Latch 2 2x1 LSREN NAND SR Latch with Enable 4 2x2 LSRNR NOR SR Latch 4 2x2 Flip-Flops FD D Flip-Flop Synchronous 1 1x1 FDE D Flip-Flop Synchronous with Enable 2 2x1 FDEL D Flip-Flop Synchronous with EnableLow 2 2x1 FDS D Flip-Flop Synchronous Set Low 1 1x1 FDR D Flip-Flop Synchronous Reset Low 2 2x1 FDSR D Flip-Flop Synchronous Set/Reset Low 2 2x1 FDSA D Flip-FlopAsynchronousSet Low 2 2x1 FDN D Flip-Flop Synchronous with QN Out 1 1x1 FDHA D Flip-Flop =Half-AdderSum 1 1x1 FDOR D Flip-Flop + 2 Input OR 1 1x1 FDND D Flip-Flop + 2 Input NAND 1 1x1 FDXO D Flip-Flop + XOR 1 1x1 FDXOAN3 D Flip-Flop + XOR + 3 Input AND 1 1x1 FDORL D Flip-Flop + (A+L') 1 1x1 FDMUX 2 to 1 Multiplexer Feeding D Flip-Flop 1 1x1 FJKQ JK Flip-Flop Synchronouswith Q Low 10 3x4 FJKS JK Flip-FlopSynchronous Set Low 10 3x4 FJKR JK Flip-FlopSynchronous Reset Low 11 3x4 FJKSR JK Flip-Flop Synchronous SeVReset Low 12 3x4 FJKSA JK Flip-FlopAsynchronous Set Low 10 3x4 FJKRA JK Flip-FlopAsynchronous Reset Low 8 2x4 FT T Flip-FlopSynchronous 2 2x1 FTS T Flip-Flop Synchronous Set Low 2 2x1 FTR T Flip-Flop Synchronous Reset Low 2 1x2 FTSR T Flip-Flop Synchronous SeVReset Low 4 2x2 FTRA T Flip-Flop Asynchronous Reset Low 2 2x1 CLKEDGE Clock Edge Detect Q=1 on Rise 1 1x1 Counters CR0 0 Bit Ripple-Carry Counter 2 2x1 CR1 1 Bit Ripple-Carry Counter 2 2x1 CR4 4 Bit Ripple-Carry Counter 8 2x4 CRST Bit Stage Ripple-Carry Counter 2 2x1 CRP4 4 Bit Ripple-Carry Counter with Parallel Load 8 2x4 CRPST Bit Stage Ripple-Carry Counter with Parallel Load 3 3x1 CD4 4 Bit Decade Counter 26 4x7 CDP4 4 Bit Decade Counter with Parallel Load 33 4x9 CJ2 2 Bit Johnson Counter 2 1x2 CJ3 3 Bit Johnson Counter 4 2x2 CJ4 4 Bit Johnson Counter 4 2x2 CJ5 5 BitJohnsonCounter 6 2x3 CJ6 6 Bit JohnsonCounter 6 2x3 CJ8 8 Bit Johnson Counter 8 2x4 CJ12 12 Bit Johnson Counter 12 2x6 CJE2 2 Bit Johnson Counter with Enable 6 3x2 CJE3 3 Bit Johnson Counter with Enable 7 4x2 CJE4 4 Bit Johnson Counter with Enable 10 4x3 CJE5 5 Bit Johnson Counter with Enable 11 4x3 CJE6 6 Bit Johnson Counter with Enable 14 4x4 CJE8 8 Bit Johnson Counter with Enable 18 4x5 CJE12 12 Bit Johnson Counter with Enable 26 4x7 Adders FA1 1 Bit Full Adder 4 2x2 HA1 1 Bn Half Adder 2 2x1 HAL1 1 BitHalfAdderCarryLow 1 1x1 EC2 2 Bit Equality Comparator 6 3x2 EC3 3 Bit Equality Comparator 9 3x3 EC4 4 Bit Equality Comparator 12 3x4 EC8 8 Bit Equality Comparator 27 7x4 MC2 2 Bit MagnitudeComparator 20 3x7 Shift Registers SR2 2 Bit Shift Register 2 1x2 SR3 3 Bit Shift Register 3 1x3 SR4 4 Bit Shift Register 4 1x4 SR8 8 Bit Shift Register 8 1x8 SRP2 2 Bit Shift Register with Parallel Load 2 1x2 SRP3 3 Bit Shift Register with Parallel Load 3 1x3 SRP4 4 Bit Shift Registerwith Parallel Load 4 1x4 SRP8 8 Bit Shift Registerwith Parallel Load 8 1x8 SRPST Bit Stage Shift Register with Parallel Load 1 1x1 Converters PSC1 1 Bit Parallelto Serial Converter 1 1x1 PSC8 8 Bn Parallel to Serial Converter 8 1x8 SPC1 1 Bn Serialto Parallel Converter 4 2x2 SPC8 8 Bn Serial to Parallel Converter 32 4x8 Arithmetic Functions PCOE4 4 Bit Parity CheckerOdd/Even 5 3x2 PCOE8 8 Bit Parity Checker Odd/Even 11 4x3 PCOE9 9 Bit Parity Checker Odd/Even 12 4x4 PCOE13 13 Bit Parity CheckerOdd/Even 19 5x4 PCOE16 16 B'n Parity Checker Odd/Even 24 6x5 PCOE17 17 Bit Parity CheckerOdd/Even 24 6x5 Register Files R2 2 Bit Register File 2 1x2 R3 3 Bit Register File 3 1x3 R4 4 Bit Register File 4 1x4 R8 8 Bit Register File 8 1x8 R4X2 4 Word x 2 Bit Register File 8 4x2 R4X4 4 Word x 4 Bit Register File 16 4x4 FIFO4X2 FIFO 4 Word x 2 Bit 8 1x8 FIFO4X4 FIFO 4 Word x 4 Bit 17 1x17 TRI-STATE Functions BUFZ TRI-STATE Buffer 1 1x1 INVZ TRI-STATE Inverter 2 2x1 FDZ D Flip-Flop with TRI-STATE out 1 1x1 FDZQ D Flip-Flop with TRI-STATE Out, Q Out 1 1x1 R2Z 2 Bit Register File with TRI-STATE Out 2 1x2 R3Z 3 Bit Register File with TRI-STATE on 3 1x3 R4Z 4 Bit Register File with TRI-STATE Out 4 1x4 R8Z 8 Bit Register File with TRI-STATE Out 8 1x8 HZ Bus Driver High or Z 1 1x1 LZ Bus Driver Low or Z 1 1x1 CLKEDGEZ Clock Edge Detect Q=1 on Rise (Z) 1 1x1 Inputs/output ITTLP Input Buffer TTL Level with Pull-Up 1 1x1 OD Output Buffer Drive 1 1x1 ODP Output Buffer Drive with PullUp 1 1x1 ODF Output Buffer Drive Fast 1 1x1 ODPF Output Buffer Drive Fast with Pull-Up 1 1x1 OOC Output Buffer Open Collector 1 1x1 OP Output Buffer Open Collector with Pull-Up 1 1x1 OOCF Output Buffer Open Collector Fast 1 1x1 OPF Output Buffer Open Collector Fast with Pull-Up 1 1x1 ODEN TRI-STATE Output Drive 1 1x1 ODPEN TRI-STATE Output Drive with Pull-Up 1 1x1 ODFEN TRI-STATE Output Drive Fast 1 1x1 ODPFEN TRI-STATE Output Drive Fast with Pull-Up 1 1x1 OOCEN TRI-STATE Output Open Collector 1 1x1 OPEN TRI-STATE Output Open Collector with Pull-Up 1 1x1 OOCFEN TRI-STATE Output Open Collector Fast 1 1x1 OPFEN TRI-STATE Output Open Collector Fast with Pull-Up 1 1x1 BTTLOC Bidirectional I/O TTL Open Collector 1 1x1 BCMSOC Bidirectional l/O CMOS Open Collector 1 1x1 BTTLP Bidirectional l/O TTL Open Collector with Pull-Up 1 1x1 BCMSP Bidirectional l/O CMOS Open Collector with Pull-Up 1 1x1 BTTLDF Bidirectional I/O TTL Drive Fast 1 1x1 BCMSDF Bidirectional l/O CMOS Drive Fast 1 1x1 BTTLOCF Bidirectional l/O TTL Open Collector Fast 1 1x1 BCMSOCF Bidirectional l/O CMOS Open Collector Fast 1 1x1 BTTLPF Bidirectional l/O TTL Open Collector with Fast Pull-Up 1 1x1 BCMSPF Bidirectional l/O CMOS Open Collector with Fast Pull-Up 1 1x1 BTTLDP Bidirectional I/O TTL Drive with Pull-Up 1 1x1 BCMSDP Bidirectional I/O CMOS Drive with Pull-Up 1 1x1 BTTLDPF Bidirectional I/O TTL Drive with Fast Pull-Up 1 1x1 BCMSDPF Bidirectional I/O CMOS Drive with Fast Pull-Up 1 1x1 BCOCEN Bidirectional CMOS Open Collector with Enable 1 1x1 BCOCFEN Bidirectional CMOS Open Collector with Fast Enable 1 1x1 BCPEN Bidirectional CMOS Open Collector with Pull-Up Enable 1 1x1 BCPFEN Bidirectional CMOS Open Collector with Fast Pull-Up En1 1x1 BTOCEN Bidirectional TTL Open Collector with Enable 1 1x1 BTOCFEN Bidirectional TTL Open Collector with Fast Enable 1 1x1 BTPEN Bidirectional TTL Open Collector with Pull-Up Enable 1 1x1 BTPFEN Bidirectional TTL Open Collector with Fast Pull-Up Enable 1 1x1