Hierarchical Synthesis with SYNOPSYS
Hierarchical Synthesis with SYNOPSYS
This contains an example of how to synthesize a hierarchical
design in SYNOPSYS. You will have to figure out most of it by looking
at the following 4 files:
- sortCell.vhd - the basic cell in a
systolic sorter.
- sort.vhd - an 8-element systolic sorter
that uses "sortCell.vhd".
- dc_1_sort-cmd - A DC-SHELL command
file which uses uniquify.
- dc_2_sort-cmd - A DC-SHELL command
file which uses set_dont_touch.
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Last modified: Jan 30 1998
Comments to:
nelson@ee.byu.edu