Brad Hutchings received his PhD in Computer Science at the University of Utah in 1992 and is currently a professor at Brigham Young University (BYU). He established the Reconfigurable Computing Laboratory at BYU in 1993. During 1998, Dr. Hutchings was a visiting scholar at HP Labs in Bristol England where he was part of a group that designed and studied reconfigurable devices for portable appliances. From 2003 - 2007, he worked as a director at Tabula, a Bay-Area startup that he helped to found. He has published widely in the reconfigurable-computing community and regularly consults with industry. He serves on the committees of many of the conferences related to reconfigurable computing and FPGAs. His research interests are in programmable devices and architectures, tool flows, debugging strategies, and parallel computation.

Brent Nelson is a professor in the Department of Electrical and Computer Engineering at Brigham Young University and program head for the Computer Engineering program there.  He received his PhD in computer science in 1984 from the University of Utah in the area of VLSI CAD. His current research interests focus on two main areas.  The first is high-end computing applications of reconfigurable computing.  The second is CAD for the design of FPGA-based applications.  He currently serves as co-director for the NSF Center for Reconfigurable High Performance Computing (known as CHREC) and as director of the BYU site within that center.  

He is also active in international and globalization activities within the college, having created the college's Globalization Study Abroad program in 2007.  He will be leading a group of students to Nanjing this coming spring term again to study globalization and its impact on engineering and technology.  http://www.et.byu.edu/~nelson/studyAbroad2010

Michael J. Wirthlin receieved a B.S. degree in Electrical and Computer
Engineering from Brigham Young University (BYU) in 1992. Following his
degree, he worked at as a design engineer at a start-up in Salt Lake
City designing high-performance sound processing circuits using FPGAs.
He returned to BYU to pursue research in dynamically reconfigurable
computing and completed his Ph.D. in 1997. After completing his Ph.D.,
he worked as a Staff Research Engineer in the Systems Architecture
Laboratory at National Semiconductor Corporation in Santa Clara, CA.
At National, he participated in efforts to model and specify large,
single-chip systems including the single-chip PC.  He returned to BYU
in 1999 as a member of the faculty and is currently an Associate
Professor in the Department of Electrical and Computer Engineering at
BYU. His
research interests include reconfigurable computing, FPGA architectures,
FPGA reliability, high-level synthesis, and computer-aided design for
application-specific computing.