% Index Number:1 @InProceedings{barros-akil:92, author = "Marcelo Alves De Barros and Mohamed Akil", title = "Study and Implementation of a Real Time 3x3 Programmable Convolver with Reconfigurable Technology", booktitle = "Proceedings of Euro ASIC '92", pages = "392--395", key = "FPGA", month = {June}, year = "1992", publisher = "IEEE Computer Society Press" } % Index Number:2 % Index Number:3 @InProceedings{cai-luth:90, author = "Mike M. Cai and Daniel A. Luthi and Peter A. Ruetz and Peng H. Ang", title = "A 40 MHz Programmable and Reconfigurable Filter Processor", booktitle = "{IEEE} Custom Integrated Circuits Conference", key = "NON-FPGA", year = "1990", pages = "13.2.1--13.2.4" } % Index Number:4 @inproceedings{Bayoumi:92, Author = "Magdy A. Bayoumi", Title = "{VLSI} Architectures for {DSP} Applications: Current Trends", Booktitle = "35th Midwest Symposium on Circuits and Systems", Year = {1992}, key = "NON-FPGA", volume = "1", Pages ={150-153} } % Index Number:5 @inproceedings{hopkinson-butler:92, Author = "Thomas M. Hopkinson and G. Michael Butler", Title = "A Pipelined, High-Precision {FFT} Architecture", Booktitle = "35th Midwest Symposium on Circuits and Systems", Year = {1992}, key = "NON-FPGA", volume = "2", Pages ={835-838} } % Index Number:6 @inproceedings{satishchandra:80, Author = "D.V. Satishchandra and Victor P. Nelson", Title = "A Reconfigurable Distributed Digital Filter", Booktitle = "Distributed Data Acquisition, Computing, and Control Symposium", Year = {1980}, key = "NON-FPGA", Pages ={90-96} } % Index Number:7 @Article{chen-rabaey:92, author = "Dev C. Chen and Jan M. Rabaey", title = "A Reconfigurable Multiprocessor {IC} for Rapid Prototyping of Algorithmic-Specific High-Speed {DSP} Data Paths", journal = "{IEEE} Journal of Solid-State Circuits", key = "NON-FPGA", year = "1992", volume = "27", number = "12", pages = "1895--1904", month = {December} } % Index Number:8 @Article{hayashi:86, author = "Katsuhiko Hayashi and Kaushal K. Dhar and Kazunori Sugahara", title = "Design of High-Speed Digital Filters Suitable for Multi-{DSP} Implementation", journal = "{IEEE} Journal of Solid-State Circuits", key = "NON-FPGA", year = "1986", volume = "21", number = "1", pages = "92--106", month = {February} } % Index Number:9 @Article{chan-ngai-ho:93, author = "S.C. Chan and H.O. Ngai and K.L. HO", title = "A Programmable Image Processing System Using {FPGA}s", journal = "International Journal of Electronics", key = "FPGA", year = "1993", volume = "75", number = "4", pages = "725--730", month = {October} } % Index Number:10 @Article{wilson:93, author = "Rhonda Wilson", title = "Filter Topologies", journal = "Journal of the Audio Engneering Society", key = "NON-FPGA", year = "1993", volume = "41", number = "9", pages = "667-678", month = {September} } % Index Number:11 @Article{jackson:68, author = "Leland B. Jackson and James F. Kaiser and Henry S. McDonald", title = "An Approach to the Implementation of Digital Filters", journal = "{IEEE} Transactions on Audio and Electroacoustics", key = "NON-FPGA", year = "1968", volume = "16", number = "3", pages = "413-420", month = {September} } % Index Number:12 @inproceedings{maskell:88, Author = "D.L. Maskell and G.H. Allen", Title = "Analysis of Even Order {IIR} Digital Filters Implemented as a Cascade of First Order Complex Allpass Sections", Booktitle = "Proceedings - {IEEE} International Symposium on Circuits and Systems", Year = {1988}, key = "NON-FPGA", Pages ={531-534} } % Index Number:13 @inproceedings{laakso-hartimo:88, Author = "Timo Laakso and Iiro Hartimo", Title = "Direct Form Revisited: Recursive Filter Implementation Using Higher-Order Direct Form Sections", Booktitle = "Proceedings - {IEEE} International Symposium on Circuits and Systems", Year = {1988}, key = "NON-FPGA", Pages ={791-795} } % Index Number:14 @article{ma-taylor:90, Author = "Gin-Kou Ma and Fred J. Taylor", Title = "Multiplier Policies For Digital Signal Processing", Journal = "{IEEE} {ASSP} Magazine", Year = {1990}, key = "NON-FPGA", Pages ={6-19}, Month = {January} } % Index Number:15-1 @article{Lee1:88, Author = "Edward A. Lee", Title = "Programmable {DSP} Architectures, Part 1", Journal = "IEEE ASSP Magazine", Year = {1988}, key = "NON-FPGA", Pages ={4-19}, Month = {October} } % Index Number:15-2 @article{Lee2:89, Author = "Edward A. Lee", Title = "Programmable {DSP} Architectures, Part 2", Journal = "IEEE ASSP Magazine", Year = {1989}, key = "NON-FPGA", Pages ={4-13}, Month = {January} } % Index Number:16 @Article{gold-bially:73, author = "Ben Gold and Theodore Bially", title = "Parallelism in Fast {F}ourier Transform Hardware", journal = "{IEEE} Transactions on Audio and Electroacoustics", key = "NON-FPGA", year = "1973", volume = "21", number = "1", pages = "5-16", month = {February} } % Index Number:17 @inproceedings{ruetz-cai:90, Author = "Peter A. Ruetz and Mike M. Cai", Title = "A Real Time {FFT} Chip Set: Architectural Issues", Booktitle = "Proceedings of the 10th International Conference on Pattern Recognition", Year = {1990}, volume = "2", key = "NON-FPGA", Pages ={385-388} } % Index Number:18 @Misc{lee-gove:94, author = "Woobin Lee and Jeremiah Golston and Robert J. Gove and Youngmin Kim", title = "Real-time {MPEG} Video Codec on a Single-Chip Multiprocessor", key = "NON-FPGA", howpublished = "", year = "1994", } % Index Number:19 @Misc{lee-gove-read:94, author = "Woobin Lee and Robert J. Gove and Chris J. Read and Youngmin Kim", title = "MediaStation 5000: An Integrated Multimedia Video and Audio Processing System", key = "NON-FPGA", howpublished = "Submitted to {IEEE} Multimedia Magazine for Jan. 94", year = "1994", } % Index Number:20 @Article{gnanasekaran:83, author = "R. Gnanasekaran", title = "On a Bit-Serial Input and Bit-Serial Output Multiplier", journal = "{IEEE} Transactions on Computers", key = "NON-FPGA", year = "1983", volume = "32", number = "9", pages = "878-880", month = {September} } % Index Number:21 @Article{obrien-holland:89, author = "J. O'Brien and J. Mather and B. Holland", title = "A 200 {MIPS} Single-Chip {1K} {FFT} Processor", journal = "{IEEE} International Solid-State Circuits Conference", key = "NON-FPGA", year = "1989", pages = "166-167", month = {February} } % Index Number:22 @Article{sunada-chen:94, author = "Glen Sunada and Jain Jin and Matt Berzins and Tom Chen", title = "{COBRA}: An 1.2 Million Transistor Expandable Column {FFT} Chip", journal = "{IEEE} International Conference on Computer Design", key = "NON-FPGA", year = "1994", pages = "546-550" } % Index Number:23 @article{Lyon:76, Author = "R.F. Lyon", Title = "Two's Complement Pipeline Multipliers", Journal = "IEEE Transactions On Communications", Year = {1976}, key = "NON-FPGA", Pages ={418-424}, Month = {April} } % Index Number:24 @inproceedings{Gebotys:94, Author = "Catherine H. Gebotys and Robert J. Gebotys", Title = "Application-Specific Architectures for Field-Programmable {VLSI} Technologies", Booktitle = "Proceedings of the Twenty-Seventh Annual Hawaii International Conference on System Sciences", Year = {1994}, key = "FPGA", Pages ={124--130} } % Index Number:25 @article{Viredaz-Ienne:94, Author = "Paolo Ienne and Marc A. Viredaz", Title = "Bit-Serial Multipliers and Squarers", Journal = "{IEEE} Transactions on Computers", Year = {1994}, key = "NON-FPGA", volume = "43", number = "12", Pages ={1445-1450}, Month = {December} } % Index Number:26 @article{hoffman-vogt:93, Author = "T. Hoffmann and D. Muller and C. Vogt", Title = "Video Compression Techniques for Multimedia Communications", Journal = "Electrical Communication - 4th Quarter", Year = {1993}, key = "NON-FPGA", Pages ={402-410} } % Index Number:27 @article{Yamauchi-Suzuki:92, Author = "Hironori Yamauchi and Yutaka Tashiro and Toshihiro Minami and Yutaka Suzuki", Title = "Architecture and Implementation of a Highly Parallel Single-Chip Video {DSP}", Journal = "{IEEE} Transactions on Circuits and Systems for Video Technology", Year = {1992}, key = "NON-FPGA", volume = "2", number = "2", Pages ={207-219}, Month = {June} } % Index Number:28 @article{Bursky-1:93, Author = "Dave Bursky", Title = "Improved {DSP} {IC}s Eye New Horizons", Journal = "Electronic Design", Year = {1993}, key = "NON-FPGA", Pages ={69-82}, Month = {November} } % Index Number:29 @article{Chapman:94, Author = "Kenneth David Chapman", Title = "Fast Integer Multipliers Fit in {FPGA}'s", Journal = "{EDN}", key = "FPGA", Year = {1994}, Pages ={80}, Month = {May 12} } % Index Number:30 @Misc{Goslin:95, author = "Gregory Ray Goslin", title = "16-Tap 8-bit {FIR} Applications Guide", key = "FPGA", howpublished = "Xilinx Applications Note", year = "1995", } % Index Number:31 @article{Bursky-2:93, Author = "Dave Bursky", Title = "{CODEC} Compresses Images in Real Time", Journal = "Electronic Design", Year = {1993}, key = "NON-FPGA", Pages ={123-124}, Month = {October 1} } % Index Number:32 @article{guttag:94, Author = "Karl M. Guttag", Title = "Multimedia Powerhouse", Journal = "{BYTE}", Year = {1994}, key = "NON-FPGA", Pages ={57-64}, Month = {June} } % Index Number:33 @article{wayner:94, Author = "Peter Wayner", Title = "Digital Video Goes Real-Time", Journal = "{BYTE}", Year = {1994}, key = "NON-FPGA", Pages ={107-112}, Month = {January} } % Index Number:34 @article{Jain-Yoshino:90, Author = "Rajeev Jain and Paul T. Yang and Bong-Young Chung and Charles Chien and Loke Kun Tan and Toshiaki Yoshino", Title = "{FIRGEN} A {CAD} System for Automatic Layout Generation of High-Performance {FIR} Filter", Journal = "{IEEE} 1990 Custom Integrated Circuits Conference", Year = {1990}, key = "NON-FPGA", Pages ={14.6.1-14.6.4} } % Index Number:35 @article{Jain-Yang:91, Author = "Rajeev Jain and Paul Yang and Toshiaki Yoshino", Title = "{FIRGEN:} A Computer-Aided Design System for High Performance {FIR} Filter Integrated Circuits", Journal = "{IEEE} Transactions on Signal Processing", Year = {1991}, key = "NON-FPGA", volume = "39", number = "7", Pages ={1655-1668}, Month = {July} } % Index Number:36 @article{Fatemi:94, Author = "O. Fatemi and F. Idris and S. Panchanathan", Title = "{FPGA} Implementation of the {LRU} Algorithm for Video Compression", Journal = "{IEEE} Transactions on Consumer Electronics", Year = {1994}, key = "FPGA", volume = "40", number = "3", Pages ={337-343}, Month = {August} } % Index Number:37 @article{Evans:93, Author = "Joseph B. Evans", Title = "An Efficient {FIR} Filter Architecture", Journal = "{IEEE} International Symposium on Circuits and Systems", Year = {1993}, key = "FPGA", volume = "1", number = "3", Pages ={627-630}, Month = {May} } % Index Number: 38 @inproceedings{fir:94, Author = "Chi-Jui Chou and Mohanakrishnan and Joseph B. Evans", Title = "FPGA Implementation of Digital Filters", Booktitle = "Proceedings of the Fourth International Conference on Signal Processing Applications and Technology", key = "FPGA", Year = {1994}, Pages ={80-88} } % Index Number: 39 @inproceedings{Puckey:93, Author = "Mohamed Wahab and Darren Puckey", Title = "FPGA-based DSP Systems.", Booktitle = "More FPGAs", key = "FPGA", Year = {1993}, Pages ={291-298}, } % Index Number: 40 @InProceedings{bergmann-mudge:94, author = "N. W. Bergmann and J. C. Mudge", title = "Comparing the Performance of {FPGA}-Based Custom Computers with General-Purpose Computers for {DSP} Applications", key = "FPGA", editor = "D. A. Buell and K. L. Pocek", pages = "164--171", booktitle = "Proceedings of IEEE Workshop on {FPGA}s for Custom Computing Machines", year = "1994", address = "Napa, CA", month = {April} } % Index Number:41 @article{Knapp:90, Author = "Steven K. Knapp", Title = "Accelerate {FPGA} Macros with One-Hot Approach", Journal = "Electronic Design", Year = {1990}, key = "FPGA", Pages ={71-78}, Month = {September 13} } % Index Number: 42 @InProceedings{andraka:93, author = "Raymond J. Andraka", title = "{FIR} Filter Fits in an {FPGA} using a Bit-Serial Approach", key = "FPGA", booktitle = "Third Annual {PLD} Design Conference and Exhibit", year = "1993", } % Index Number:43 @article{Mintzer:93, Author = "Les Mintzer", Title = "{FIR} Filters with Field-Programmable Gate Arrays", Journal = "Journal of {VLSI} Signal Processing", Year = {1993}, volume = "6", number = "2", key = "FPGA", Pages ={119-127} } % Index Number:44 @article{Giri:94, Author = "A. Giri and V. Visvanathan and S.K. Nandy and S.K. Ghoshal", Title = "High Speed Digital Filtering on {SRAM}-Based {FPGA}s", Journal = "7th International Conference on {VLSI} Design", Year = {1994}, key = "FPGA", Pages ={229-232}, Month = {January} } % Index Number:45 @InBook{duff:86, author = {M.J.B. Duff}, title = {Evaluation of Multicomputers for Image Processing}, chapter = {How Not to Benchmark Image Processors}, publisher = {Academic Press}, year = 1986, pages = {3--12} } % Index Number:46 @InProceedings{corry-patel:83, author = {A. Corry and K. Patel}, title = {Architecture of a {CMOS} Correlator}, booktitle = {1983 IEEE International Symposium on Circuits and Systems}, volume = 1421, year = 1983, month = {May}, pages = {522-525} } % Index Number:47 @InProceedings{powell-irwin:78, author = {N. R. Powell and J. M. Irwin}, title = {Signal processing with bit-serial word-parallel architectures}, booktitle = "Proceedings of the International Society of Optical Engineering (SPIE). Visual Communications and Image Processing. Real-Time Signal Processing", volume = 154, year = 1978, pages = {98--104} } % Index Number:48 @Article{mactaggart:84, author = {I. R. Mactaggart and M. A. Jack}, title = {A Single Chip Radix-2 {FFT} Butterfly Architecture Using Parallel Data Distributed Arithmetic}, journal = {IEEE Journal of Solid-State Circuits}, year = 1984, volume = {{SC}-19}, number = 3, month = {JUne}, pages = {368--373} } % Index Number:49 @Article{santoro-horowitz:89, author = {M. R. Santoro and M. A. Horowitz}, title = {{SPIM}: A Pipelined 64 x 64-bit Iterative Multiplier}, journal = {IEEE Journal of Solid-State Circuits}, year = 1989, volume = 24, number = 2, month = {April}, pages = {487-493} } % Index Number:50 @Article{hartley-corbett:90, author = {R. Hartley and P. Corbett}, title = {Digit-Serial Processing Techniques}, journal = {IEEE Transactions on Circuits and Systems}, year = 1990, volume = 37, number = 6, month = {June}, pages = {707--719} } % Index Number:51 @Article{cantoni-levialdi:83, author = {V. Cantoni and S. Levialdi}, title = {Matching the Task to an Image Processing Architecture}, journal = {Computer Vision, Graphics, and Image Processing}, year = 1993, volume = 22, number = 2, pages = {301--309} } % Index Number:52 @Article{thompson-tewksbury:82, author = {J. S. Thompson and S. K. Tewksbury}, title = {{LSI} Signal Processor Architecture for Telecommunications Applications}, journal = {IEEE Transactions on Acoustics, Speech and Signal Processing}, year = 1982, volume = {ASSP-30}, number = 4, pages = {613-631} } % Index Number:53 @InProceedings{yeung-rabaey:95, author = {A. K. Yeung and J. M. Rabaey}, title = {A 2.4 {GOPs} Data-Driven Reconfigurable Multiprocessor {IC} for {DSP}}, booktitle = {IEEE International Solid-State Circuits Conference, ISSCC}, year = 1995, pages = {108-109} } @InProceedings{goslin:95b, author = "G. R. Goslin", title = "Using {Xilinx} {FPGAs} to design custom Digital Signal Processing Devices", pages = "565--604", booktitle = "1995 Proceedings of {DSPX}", year = "1995", month = {January}, } @book{hwang:79, Author = "Kai Hwang", Title = "Computer Arithmetic: Principles, Architecture, and Design", Publisher = {John Wiley \& Sons}, Year = {1979} } @book{koren:93, Author = "Israel Koren", Title = "Computer Arithmetic Algorithms", Publisher = {Prentice Hall}, Year = {1993} } @book{texasinst:91, Author = "Semiconductor Group", Title = "Digital Signal Processing Products and Applications Primer", Publisher = {Texas Instruments}, Year = {1991} } @book{oppsch:89, Author = "Alan V. Oppenheim and Ronald W. Schafer", Title = "Discrete-Time Signal Processing", Publisher = {Prentice Hall}, Year = {1989} } @InBook{heller:85, author = {Don Heller}, title = {{VLSI} and Modern Signal Processing}, chapter = {11, Partitioning Big Matrices for Small Systolic Arrays}, publisher = {Prentice-Hall}, year = 1985, pages = {185--199} } @InBook{uhr86, author = {Leonard Uhr}, title = {Evaluation of Multicomputers for Image Processing}, chapter = {On Benchmarks: Dynamically Improving Experimental Comparisons}, publisher = {Academic Press}, year = 1986, pages = {13--21} } @InProceedings{reddy-hon:79, author = "D. R. Reddy and R. W. Hon", title = "Computer Architecture for Vision", editor = "G. G. Dodd and L Rossol", pages = "169--186", booktitle = "Computer Vision and Sensor-Based Robots", year = 1979, publisher = "Plenum Press", callnum = "TS191 .S96 1978" } @Book{madisetti:95, author = "Vijay K. Madisetti", title = "{VLSI} Digital Signal Processors: An Introduction to Rapid Prototyping and Design Synthesis", publisher = "{IEEE} Press", year = 1995, callnum = "TK 7895.m5 m33" } @Book{bowen-brown:82, author = "B. A. Bowen and W. R. Brown", title = "{VLSI} Systems Design for Digital Signal Processing: Signal Processing and Signal Processors", publisher = "Prentice-Hall", year = 1982, volume = 1, callnum = "TK 7868.D5 B68" } @Article{cantoni-levialdi:83, author = "V. Cantoni and S. Levialdi", title = "Matching the Task to an Image Processing Architecture", journal = "Computer Vision, Graphics, and Image Processing", year = 1983, volume = 22, number = 2, pages = "301--309", month = "May", abstract = { Several different computer architectures have been suggested or built to overcome the Von Neumann bottleneck. Particularly in image processing, data structures and algorithm organization may benefit from a good match with the new architectures. Such a match may be defined as the degree of exploitation of the system resources (including time) to obtain the specific solution. A diagram that shows the existing match between classes of machines, data structures, and computational structures is given in this paper. A comparison of the performance of extreme architectures on a limited number of benchmarks, chosen from the most popular IP tasks, concludes this work.} } @Book{lapsley:96, author = "P. Lapsley and J. Bier and A. Shoham and E. A. Lee", title = "{DSP} Processor Fundamentals", publisher = "Berkeley Design Technology, Inc.", year = 1996 } @Proceedings{bayoumi-swartzlander:94, title = "{VLSI} Signal Processing Technology", year = 1994, editor = "Magdy A. Bayoumi and Earl E. Swartzlander, Jr.", publisher = "Kluwer Academic Publishers", callnum = "TK 5102.9.V54" } @Book{hussain, author = {Zahid Hussain}, title = {Digital Image Processing: Practical Applications of Parallel Processing Techniques}, publisher = {Ellis Horwood}, year = 1991, callnum = "TA1632.H87x" } @InProceedings{Bayoumi:94, author = "Magdy A. Bayoumi", title = "{VLSI DSP} Technology: Current Developments", editor = "Magdy A. Bayoumi and Earl E. Swartzlander, Jr.", pages = "1--24", booktitle = "{VLSI} Signal Processing Technology", year = 1994, publisher = "Kluwer Academic Publishers" } @InProceedings{konstantinides:94, author = "Konstantinos Konstantinides and Vasudev Bhaskaran", title = "Recent Developments in the Design of Image and Video Processing ICs", editor = "Magdy A. Bayoumi and Earl E. Swartzlander, Jr.", pages = "25--57", booktitle = "{VLSI} Signal Processing Technology", year = 1994, publisher = "Kluwer Academic Publishers" } @Article{chen-rabaey:92, author = "Dev C. Chen and Jan M. Rabaey", title = "A Reconfigurable Multiprocessor {IC} for Rapid Prototyping of Algorithmic-Specific High-Speed {DSP} Data Paths", journal = "{IEEE} Journal of Solid-State Circuits", year = "1992", volume = "27", number = "12", pages = "1895--1904", month = {December} }